Érika Cota
Cited by
Cited by
A scalable test strategy for network-on-chip routers
AM Amory, E Brião, É Cota, M Lubaszewski, FG Moraes
IEEE International Conference on Test, 2005., 9 pp.-599, 2005
The impact of NoC reuse on the testing of core-based systems
É Cota, M Kreutz, CA Zeferino, L Carro, M Lubaszewski, A Susin
Proceedings. 21st VLSI Test Symposium, 2003., 128-133, 2003
Reliability, Availability and Serviceability of Networks-on-chip
É Cota, A de Morais Amory, MS Lubaszewski
Springer Science & Business Media, 2011
Power-aware NoC Reuse on the Testing of Core-based Systems.
E Cota, L Carro, F Wagner, M Lubaszewski
International Test Conference, 612-621, 2003
Reusing an on-chip network for the test of core-based systems
É Cota, L Carro, M Lubaszewski
ACM Transactions on Design Automation of Electronic Systems (TODAES) 9 (4 …, 2004
A high-fault-coverage approach for the test of data, control and handshake interconnects in mesh networks-on-chip
E Cota, FL Kastensmidt, M Cassel, M Hervé, P Almeida, P Meirelles, ...
IEEE Transactions on Computers 57 (9), 1202-1215, 2008
Power-aware test scheduling in network-on-chip using variable-rate on-chip clocking
C Liu, J Shi, E Cota, V Iyengar
23rd IEEE VLSI Test Symposium (VTS'05), 349-354, 2005
Dependable network-on-chip router able to simultaneously tolerate soft errors and crosstalk
AP Frantz, FL Kastensmidt, L Carro, E Cota
2006 IEEE International Test Conference, 1-9, 2006
Test scheduling for network-on-chip with BIST and precedence constraints
C Liu, E Cota, H Sharif, DK Pradhan
2004 International Conferce on Test, 1369-1378, 2004
Constraint-driven test scheduling for NoC-based systems
E Cota, C Liu
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2006
Crosstalk-and SEU-aware networks on chips
AP Frantz, M Cassel, FL Kastensmidt, É Cota, L Carro
IEEE Design & Test of Computers 24 (4), 340-350, 2007
Improving yield of torus NoCs through fault-diagnosis-and-repair of interconnect faults
C Concatto, P Almeida, F Kastensmidt, E Cota, M Lubaszewski, M Herve
2009 15th IEEE International On-Line Testing Symposium, 61-66, 2009
Designing a radiation hardened 8051-like micro-controller
FG de Lima, E Cota, L Carro, M Lubaszewski, R Reis, R Velazco, ...
Proceedings 13th Symposium on Integrated Circuits and Systems Design (Cat …, 2000
Microsystems testing: an approach and open problems
M Lubaszewski, ÉF Cota, B Courtois
Proceedings of the conference on Design, automation and test in Europe, 524-529, 1998
Evaluating SEU and crosstalk effects in network-on-chip routers
AP Frantz, L Carro, É Cota, FL Kastensmidt
12th IEEE International On-Line Testing Symposium (IOLTS'06), 2 pp., 2006
A new adaptive analog test and diagnosis system
EF Cota, M Negreiros, L Carro, M Lubaszewski
IEEE Transactions on Instrumentation and Measurement 49 (2), 223-227, 2000
Concurrent test of network-on-chip interconnects and routers
M Hervé, P Almeida, FL Kastensmidt, É Cota, M Lubaszewski
2010 11th Latin American Test Workshop, 1-6, 2010
Test planning and design space exploration in a core-based environment
E Cota, L Carro, A Orailoglu, M Lubaszewski
Proceedings 2002 Design, Automation and Test in Europe Conference and …, 2002
Functional test of mesh-based nocs with deterministic routing: Integrating the test of interconnects and routers
MB Hervé, M Moraes, P Almeida, M Lubaszewski, FL Kastensmidt, É Cota
Journal of Electronic Testing 27 (5), 635-646, 2011
Diagnosis of interconnect shorts in mesh NoCs
M Herve, E Cota, FL Kastensmidt, M Lubaszewski
2009 3rd ACM/IEEE International Symposium on Networks-on-Chip, 256-265, 2009
The system can't perform the operation now. Try again later.
Articles 1–20