Arijit Raychowdhury
Arijit Raychowdhury
Steve W. Chaddick School Chair for ECE, Georgia Institute of Technology
Verified email at
Cited by
Cited by
2018 IEEE Int. Electron Devices Meeting (IEDM)
Z Wang, B Crafton, J Gomez, R Xu, A Luo, Z Krivokapic, L Martin, S Datta, ...
IEEE 13, 1, 2018
Carbon-nanotube-based voltage-mode multiple-valued logic design
A Raychowdhury, K Roy
IEEE Transactions on Nanotechnology 4 (2), 168-179, 2005
A 45 nm resilient microprocessor core for dynamic variation tolerance
KA Bowman, JW Tschanz, SLL Lu, PA Aseron, MM Khellah, ...
IEEE Journal of Solid-State Circuits 46 (1), 194-208, 2010
A circuit-compatible model of ballistic carbon nanotube field-effect transistors
A Raychowdhury, S Mukhopadhyay, K Roy
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2004
Masked face recognition for secure authentication
A Anwar, A Raychowdhury
arXiv preprint arXiv:2008.11104, 2020
Modeling of metallic carbon-nanotube interconnects for circuit simulations and a comparison with Cu interconnects for scaled technologies
A Raychowdhury, K Roy
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2005
Leakage power analysis and reduction for nanoscale circuits
A Agarwal, S Mukhopadhyay, A Raychowdhury, K Roy, CH Kim
IEeE Micro 26 (2), 68-80, 2006
Synchronized charge oscillations in correlated electron systems
N Shukla, A Parihar, E Freeman, H Paik, G Stone, V Narayanan, H Wen, ...
Scientific reports 4 (1), 4964, 2014
H Naeimi, C Augustine, A Raychowdhury, SL Lu, J Tschanz
intel technology journal 17 (1), 2013
Roadmap on emerging hardware and technology for machine learning
K Berggren, Q Xia, KK Likharev, DB Strukov, H Jiang, T Mikolajick, ...
Nanotechnology 32 (1), 012002, 2020
TapeCache: A high density, energy efficient cache based on domain wall memory
R Venkatesan, V Kozhikkottu, C Augustine, A Raychowdhury, K Roy, ...
Proceedings of the 2012 ACM/IEEE international symposium on Low power …, 2012
Carbon nanotube electronics: design of high-performance and low-power digital circuits
A Raychowdhury, K Roy
IEEE Transactions on Circuits and Systems I: Regular Papers 54 (11), 2391-2401, 2007
Accurate estimation of total leakage current in scaled CMOS logic circuits based on compact current modeling
S Mukhopadhyay, A Raychowdhury, K Roy
Proceedings of the 40th annual Design Automation Conference, 169-174, 2003
Design space and scalability exploration of 1T-1STT MTJ memory arrays in the presence of variability and disturbances
A Raychowdhury, D Somasekhar, T Karnik, V De
2009 IEEE International Electron Devices Meeting (IEDM), 1-4, 2009
The changing computing paradigm with internet of things: A tutorial introduction
S Ray, Y Jin, A Raychowdhury
IEEE Design & Test 33 (2), 76-96, 2016
Vertex coloring of graphs via phase dynamics of coupled oscillatory networks
A Parihar, N Shukla, M Jerry, S Datta, A Raychowdhury
Scientific reports 7 (1), 911, 2017
Accurate estimation of total leakage in nanometer-scale bulk CMOS circuits based on device geometry and doping profile
S Mukhopadhyay, A Raychowdhury, K Roy
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2005
Device optimization for digital subthreshold logic operation
BC Paul, A Raychowdhury, K Roy
IEEE Transactions on Electron Devices 52 (2), 237-247, 2005
X-DeepSCA: Cross-device deep learning side channel attack
D Das, A Golder, J Danial, S Ghosh, A Raychowdhury, S Sen
Proceedings of the 56th Annual Design Automation Conference 2019, 1-6, 2019
5.6 A 0.13 μm fully digital low-dropout regulator with adaptive control and reduced dynamic stability for ultra-wide dynamic range
SB Nasir, S Gangopadhyay, A Raychowdhury
2015 IEEE International Solid-State Circuits Conference-(ISSCC) Digest of …, 2015
The system can't perform the operation now. Try again later.
Articles 1–20