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Richard Dorrance
Richard Dorrance
Research Scientist at Intel Labs
Verified email at intel.com
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Cited by
Year
A scalable sparse matrix-vector multiplication kernel for energy-efficient sparse-blas on FPGAs
R Dorrance, F Ren, D Marković
Proceedings of the 2014 ACM/SIGDA international symposium on Field …, 2014
1232014
Voltage-induced switching of nanoscale magnetic tunnel junctions
JG Alzate, PK Amiri, P Upadhyaya, SS Cherepov, J Zhu, M Lewis, ...
2012 International Electron Devices Meeting, 29.5. 1-29.5. 4, 2012
1132012
Scalability and design-space analysis of a 1T-1MTJ memory cell for STT-RAMs
R Dorrance, F Ren, Y Toriyama, AA Hafez, CKK Yang, D Markovic
IEEE Transactions on Electron Devices 59 (4), 878-887, 2012
982012
Design of a fast and low-power sense amplifier and writing circuit for high-speed MRAM
H Lee, JG Alzate, R Dorrance, XQ Cai, D Marković, PK Amiri
IEEE Transactions on Magnetics 51 (5), 1-7, 2014
652014
Diode-MTJ crossbar memory cell using voltage-induced unipolar switching for high-density MRAM
R Dorrance, JG Alzate, SS Cherepov, P Upadhyaya, IN Krivorotov, ...
IEEE Electron Device Letters 34 (6), 753-755, 2013
652013
A cm-scale self-powered intelligent and secure IoT edge mote featuring an ultra-low-power SoC in 14nm tri-gate CMOS
T Karnik, D Kurian, P Aseron, R Dorrance, E Alpman, A Nicoara, R Popov, ...
2018 IEEE International Solid-State Circuits Conference-(ISSCC), 46-48, 2018
612018
A charge domain SRAM compute-in-memory macro with C-2C ladder-based 8-bit MAC unit in 22-nm FinFET process for edge inference
H Wang, R Liu, R Dorrance, D Dasalukunte, D Lake, B Carlton
IEEE Journal of Solid-State Circuits 58 (4), 1037-1050, 2023
592023
802.11 g/n compliant fully integrated wake-up receiver with− 72-dBm sensitivity in 14-nm FinFET CMOS
E Alpman, A Khairi, R Dorrance, M Park, VS Somayazulu, JR Foerster, ...
IEEE Journal of Solid-State Circuits 53 (5), 1411-1422, 2018
482018
A body-voltage-sensing-based short pulse reading circuit for spin-torque transfer RAMs (STT-RAMs)
F Ren, H Park, R Dorrance, Y Toriyama, CKK Yang, D Marković
Thirteenth International Symposium on Quality Electronic Design (ISQED), 275-282, 2012
472012
A single-precision compressive sensing signal reconstruction engine on FPGAs
F Ren, R Dorrance, W Xu, D Markovic
Field Programmable Logic and Applications (FPL), 2013 23rd International …, 2013
422013
An 802.11 ba-based wake-up radio receiver with Wi-Fi transceiver integration
R Liu, AB KT, R Dorrance, D Dasalukunte, V Kristem, MAS Lopez, AW Min, ...
IEEE Journal of Solid-State Circuits 55 (5), 1151-1164, 2019
402019
A 32.2 TOPS/W SRAM compute-in-memory macro employing a linear 8-bit C-2C ladder for charge domain computation in 22nm for edge inference
H Wang, R Liu, R Dorrance, D Dasalukunte, X Liu, D Lake, B Carlton, ...
2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and …, 2022
352022
Systems, methods, and devices for driving control
D Dasalukunte, R Dorrance, I Alvarez, MS Elli, S Sharma, JHA Satish, ...
US Patent 11,597,393, 2023
292023
Modeling and Design of STT-MRAMs
RW Dorrance
MS Thesis, 2011
24*2011
Wake up radio device, circuit configuration, and method
R Dorrance, M Park, AW Min, F Sheikh
US Patent 9,967,820, 2018
232018
Devices and methods for updating maps in autonomous driving systems in bandwidth constrained networks
R Dorrance, I Alvarez, D Dasalukunte, SMI Alam, S Sharma, K Sivanesan, ...
US Patent 11,375,352, 2022
212022
Read-disturbance-free nonvolatile content addressable memory (CAM)
PK Amiri, R Dorrance, D Markovic, KL Wang
US Patent 9,047,950, 2015
212015
An analysis of complex-valued CNNs for RF data-driven wireless device classification
J Chen, WK Wong, B Hamdaoui, A Elmaghbub, K Sivanesan, R Dorrance, ...
ICC 2022-IEEE International Conference on Communications, 4318-4323, 2022
152022
An 802.11ba 495μW -92.6dBm-Sensitivity Blocker-Tolerant Wake-up Radio Receiver Fully Integrated with Wi-Fi Transceiver
R Liu, AB KT, R Dorrance, D Dasalukunte, MAS Lopez, V Kristem, S Azizi, ...
2019 IEEE Radio Frequency Integrated Circuits Symposium (RFIC), 255-258, 2019
132019
Scalability and design-space analysis of a 1T-1MTJ memory cell
R Dorrance, F Ren, Y Toriyama, A Amin, CKK Yang, D Marković
2011 IEEE/ACM International Symposium on Nanoscale Architectures, 32-36, 2011
112011
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