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Wei Zhou
Wei Zhou
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Title
Cited by
Cited by
Year
Method of making multichip wafer level packages and computing systems incorporating same
SK Chua, SW Low, YP Chia, MK Eng, YL Neo, SJ Boon, S Huang, ...
US Patent 7,485,562, 2009
207*2009
Packaged microelectronic components
EM Koon, LS Waf, CM Yu, CY Poo, SB Leng, Z Wei
US Patent 6,836,009, 2004
1302004
Castellation wafer level packaging of integrated circuit chips
BS Jeung, CY Poo, LS Waf, EM Koon, CS Kwang, HS Wu, NY Loo, Z Wei
US Patent 6,855,572, 2005
842005
Multi-chip wafer level system packages and methods of forming same
SK Chua, SW Low, YP Chia, MK Eng, YL Neo, SJ Boon, S Huang, ...
US Patent 6,964,881, 2005
522005
A new variable-order singular boundary element for calculating stress intensity factors in three-dimensional elasticity problems
W Zhou, KM Lim, KH Lee, AAO Tay
International journal of solids and structures 42 (1), 159-185, 2005
312005
A new variable‐order singular boundary element for two‐dimensional stress analysis
KM Lim, KH Lee, AAO Tay, W Zhou
International journal for numerical methods in engineering 55 (3), 293-316, 2002
312002
Multichip wafer level packages and computing systems incorporating same
SK Chua, SW Low, YP Chia, MK Eng, YL Neo, SJ Boon, S Huang, ...
US Patent 7,087,992, 2006
302006
Castellation wafer level packaging of integrated circuit chips
SJ Boon, YP Chia, SW Low, MK Eng, SK Chua, SW Huang, YL Neo, ...
US Patent 7,193,312, 2007
272007
Semiconductor device with an electrically-coupled protection mechanism and associated systems, devices, and methods
W Zhou, BK Street
US Patent 10,475,771, 2019
232019
Packaged microelectronic components
EM Koon, LS Waf, CM Yu, CY Poo, SB Leng, Z Wei
US Patent 7,195,957, 2007
232007
Methods for forming semiconductor device packages
Z Ma, W Zhou, A Yu
US Patent 9,202,714, 2015
222015
Semiconductor die assemblies with heat sink and associated systems and methods
W Zhou, Z Ma, A Yu
US Patent 9,349,670, 2016
212016
Methods of manufacturing multi-die semiconductor device packages and related assemblies
W Zhou, A Yu, Z Ma, S Varghese, JS Hacker, BK Street, S Luo
US Patent 9,865,578, 2018
182018
Studies on moisture-induced failures in ACF interconnection
Z Wei, LS Waf, NY Loo, EM Koon, M Huang
Electronics Packaging Technology Conference, 2002. 4th., 133-138, 2002
172002
Semiconductor devices comprising protected side surfaces and related methods
Z Ma, W Zhou, CC So, SL Ang, A Yu
US Patent 9,786,643, 2017
142017
Semiconductor constructions having interconnect structures, methods of forming interconnect structures, and methods of forming semiconductor constructions
Z Wei, C Poo
US Patent App. 11/436,172, 2007
142007
Methods of processing wafer-level assemblies to reduce warpage, and related assemblies
A Yu, W Zhou, Z Ma, BK Street
US Patent 9,589,933, 2017
112017
Lead frames, microelectronic devices with lead frames, and methods for manufacturing lead frames and microelectronic devices with lead frames
W Zhou, BL Ser
US Patent App. 11/507,718, 2008
92008
Enhancing solder joint fatigue life for ball grid array packages
Z Wei, LB Kuan
Proceedings of the 5th Electronics Packaging Technology Conference (EPTC …, 2003
92003
Semiconductor device with a protection mechanism and associated systems, devices, and methods
W Zhou, BK Street, ME Tuttle
US Patent 10,580,710, 2020
72020
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