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Kensuke Iizuka
Kensuke Iizuka
Verified email at am.ics.keio.ac.jp
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Cited by
Year
M-KUBOS/PYNQ Cluster for multi-access edge computing
T Inage, K Hironaka, K Iizuka, K Ito, Y Fukushima, M Namiki, H Amano
2021 Ninth International Symposium on Computing and Networking (CANDAR), 95-101, 2021
292021
Implementing a multi-ejection switch and making the use of multiple Lanes in a circuit-switched multi-FPGA system
K Ito, K Iizuka, K Hironaka, Y Hu, M Koibuchi, H Amano
2020 Eighth International Symposium on Computing and Networking Workshops …, 2020
212020
Parallel implementation of CNN on multi-FPGA cluster
Y Fukushima, K Iizuka, H Amano
IEICE TRANSACTIONS on Information and Systems 106 (7), 1198-1208, 2023
182023
Remote dynamic reconfiguration of a multi-FPGA system FiC (Flow-in-Cloud)
K Hironaka, K Iizuka, M Yamakura, AB Ahmed, H Amano
IEICE TRANSACTIONS on Information and Systems 104 (8), 1321-1331, 2021
142021
Improving the performance of circuit-switched interconnection network for a multi-fpga system
K Ito, K Iizuka, K Hironaka, Y Hu, M Koibuchi, H Amano
IEICE TRANSACTIONS on Information and Systems 104 (12), 2029-2039, 2021
82021
Horizontal division of deep learning applications with all-to-all communication on a multi-FPGA system
Y Yamauchi, AB Ahmed, K Hironaka, K Iizuka, H Amano
2020 Eighth International Symposium on Computing and Networking Workshops …, 2020
82020
Power analysis of directly-connected fpga clusters
K Iizuka, H Takagi, A Kamei, K Hironaka, H Amano
2022 IEEE Symposium in Low-Power and High-Speed Chips (COOL CHIPS), 1-6, 2022
62022
Hybrid network of packet switching and stdm in a multi-fpga system
T Shimizu, K Ito, K Iizuka, K Hironaka, H Amano
2021 IEEE Symposium in Low-Power and High-Speed Chips (COOL CHIPS), 1-6, 2021
32021
Demonstration of flow-in-cloud: A multi-fpga system
K Hironaka, K Iizuka, AB Ahmed, MMI Ullah, Y Yamauchi, Y Sun, ...
2019 29th International Conference on Field Programmable Logic and …, 2019
32019
A Message Passing Interface Library for High-Level Synthesis on Multi-FPGA Systems
K Hironaka, K Iizuka, H Amano
2022 IEEE 15th International Symposium on Embedded Multicore/Many-core …, 2022
12022
Expanding Problem-Size Capacity in FPGA-based Amoeba-inspired SAT Solver with External DRAM
R Yasaka, K Ohkoda, M Aono, K Iizuka, H Amano
IEICE Proceedings Series 80 (P-27), 2024
2024
Multi-FPGA board implementation of the robot audition system HARK
A HASHIZUME, K IIZUKA, LIN Zirui, K ITOYAMA, K NAKADAI, H AMANO
IEICE Proceedings Series 80 (P-26), 2024
2024
An FPGA implementation of Mondrian algorithm
K Ken, K IIZUKA, H AMANO
IEICE Proceedings Series 80 (P-28), 2024
2024
Power analysis of an optical interconnected FPGA cluster for roadside units
H Amano, K Iizuka
2024 IEEE International Conference on Consumer Electronics (ICCE), 1-2, 2024
2024
Board Allocation Algorithm for the Resource Management System of FiC
T Inage, K Iizuka, H Amano
2023 IEEE 16th International Symposium on Embedded Multicore/Many-core …, 2023
2023
Power Analysis and Power Modeling of Directly-Connected FPGA Clusters
K Iizuka, H Takagi, A Kamei, K Hironaka, H Amano
IEICE TRANSACTIONS on Information and Systems 106 (12), 1997-2005, 2023
2023
Parallel Implementation of Vision Transformer on a Multi-FPGA Cluster
Y Fukushima, K Iizuka, H Amano
2023 Eleventh International Symposium on Computing and Networking (CANDAR …, 2023
2023
A Multi-FPGA Implementation of FM-Index Based Genomic Pattern Search
U Imdad, AB Ahmed, K Hironaka, K Iizuka, H Amano
IEICE TRANSACTIONS on Information and Systems 106 (11), 1783-1795, 2023
2023
Pelaksanaan Selari CNN pada Kluster Berbilang FPGA
Y FUKUSHIMA, K IIZUKA, H AMANO
IEICE Transactions pada Maklumat 106 (7), 1198-1208, 2023
2023
Implementación Paralela de CNN en Multi-FPGA Cluster
Y FUKUSHIMA, K IIZUKA, H AMANO
IEICE Transactions en Información 106 (7), 1198-1208, 2023
2023
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