| An adaptive-rate error correction scheme for NAND flash memory TH Chen, YY Hsiao, YT Hsing, CW Wu 2009 27th IEEE VLSI Test Symposium, 53-58, 2009 | 99 | 2009 |
| Design of division circuits for stochastic computing TH Chen, JP Hayes 2016 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 116-121, 2016 | 68 | 2016 |
| Analyzing and controlling accuracy in stochastic circuits TH Chen, JP Hayes 2014 IEEE 32nd International Conference on Computer Design (ICCD), 367-373, 2014 | 51 | 2014 |
| Non-volatile memory management method CW Wu, TH Chen, YY Hsiao, YT Hsing, NTH University US Patent 8,307,261, 2012 | 51 | 2012 |
| Behavior of stochastic circuits under severe error conditions TH Chen, A Alaghi, JP Hayes it-Information Technology 56 (4), 182-191, 2014 | 23 | 2014 |
| Equivalence among stochastic logic circuits and its application TH Chen, JP Hayes Proc Design Automation Conference (DAC), 2015 | 22 | 2015 |
| Achieving progressive precision in stochastic computing TH Chen, P Ting, JP Hayes 2017 IEEE global conference on signal and information processing (GlobalSIP …, 2017 | 20 | 2017 |
| Design of stochastic Viterbi decoders for convolutional codes TH Chen, JP Hayes 2013 IEEE 16th International Symposium on Design and Diagnostics of …, 2013 | 13 | 2013 |
| Equivalence among stochastic logic circuits and its application to synthesis TH Chen, JP Hayes IEEE Transactions on Emerging Topics in Computing 7 (1), 67-79, 2016 | 8 | 2016 |
| Designing Accurate and Low-Cost Stochastic Circuits. TH Chen | | 2016 |
| te-hsuanchen*, arminalaghi, andjohnp. hayes... TH Chen, A Alaghi it–Information Technology 56 (4), 182-191, 2014 | | 2014 |
John P HayesProfessor of EECS, University of MichiganVerified email at umich.edu
